1. Field
Embodiments of the present invention relate to a semiconductor package and a method of fabricating the same. More specifically, embodiments of the present invention relate to a semiconductor package in which a semiconductor chip and a mounting device are simultaneously packaged, and a method of fabricating the same.
2. Description of the Related Art
Recently, as chip sizes of semiconductor devices decrease and the number of input/output terminals increases due to fine processing technology and diversified functions, pitches of pad electrodes are gradually becoming finer. In addition, as convergence of various functions is accelerated, system-level packaging technology for integrating a plurality of devices in a single package is becoming critical. Further, the system-level packaging technology has been developed into three-dimensional stacking technology for maintaining short signal intervals to minimize noise between operations and improve signal speed.
Semiconductor packages have been fabricated by a flip-chip method using a bumping process for electrical connection between semiconductor chips or between a semiconductor chip and a substrate. However, such a bumping process has a problem in that the number of input/out pads and the chip size are limited due to limitations in reducing the size of the bump.
That is, when a size of a semiconductor chip is reduced and the number of input/out pads increases, a semiconductor package has limitations in fully accommodating a plurality of solder balls, that is, input/out terminals, on a top surface of the semiconductor chip. In order to solve the problem, the semiconductor packages have been developed to have an embedded structure in which a semiconductor chip is embedded in a circuit board, a fan-out structure in which solder balls, that is, final input/out terminals of a semiconductor chip, are arranged on an outer peripheral surface of the semiconductor chip, or the like.
Meanwhile, when active devices and passive devices are arranged in a single package, the active devices and passive devices are normally mounted on one package substrate at the same time. Here, the passive devices, which have a smaller number of terminals and larger pitches than the active devices, can be simply mounted on a low-end substrate by a normal surface mounting technology (SMT), but when the passive devices are mounted together with the active devices on the same substrate, a high-end package substrate is required, which results in an increase in package prices and process difficulties.
In addition, when the active devices and the passive devices are arranged in a package disposed on a carrier, a pick- and placement process is normally used. In this case, when a plurality of passive devices are included in a package, time spent in the pick- and placement process increases which directly results in an increase in package prices.
A semiconductor module and a method thereof are disclosed in Korean Unexamined Patent Publication No. 10-2012-0010021 (published Feb. 2, 2012).